As DRAMs increase in memory cell density, there is a continuous challenge to maintain sufficiently high storage capacitance despite decreasing cell area. Additionally, there is a continuing goal to further decrease cell area.
The principal way of increasing cell capacitance is to through cell structure techniques. Such techniques include three-dimensional cell capacitors, such as trenched or stacked capacitors. This invention concerns stacked capacitor cell constructions, including what are commonly known as crown or cylindrical container stacked capacitors, as well as to other stacked capacitor constructions. Aspects of the invention will have specific application in 64 Meg process flows and beyond.